AIM Photonics to Present Integrated Photonics R&D at Photonics West
Join us as experts from AIM Photonics will share a selection of the Institute’s recent technology advancements in silicon photonics at the SPIE Photonics West conference to be held Jan. 28–Feb. 2, 2023 in San Francisco, California.
In addition to the highlighted talks below, members our technical staff will also be available at our exhibit booth (#254) throughout the conference to explain how AIM Photonics can help advance your company’s innovative ideas into manufacturing-ready prototypes using our design enablement, multi-project wafer and electronic-photonic test, assembly and packaging services.
Register online for the conference and mark your calendars now to find out more about how AIM Photonics is continuing to advance the U.S. silicon photonics manufacturing ecosystem.
A Compact Ring Modulator with Very Large Extinction Ratio and High-quality Factor
Mohammad Rakib Uddin
Research and Development Engineer, AIM Photonics
In this paper, Dr. M. Rakib Uddin will present a compact PN junction ring modulator with a very large extinction ratio and high-quality factor. The characteristics of the 5 µm radius compact ring modulator, which is fabricated at AIM Photonics’ 300 mm CMOS-compatible foundry at the Albany Nanotech Complex, are measured using a fully automated wafer prober with a tunable light source with wavelengths ranging from 1485 to 1590 nm. The device exhibits a very large extinction ratio of 33 dB and a high-quality factor of about 17,000, and has a free spectral range of about 19 nm.
Wednesday, February 1 • 6:00 - 8:00 PM (PST)
Design Enablement Methodology for Silicon Photonics-based Photonic Integrated Design
Amit Dikshit
Design Enablement Manager, AIM Photonics
In this talk, Amit Dikshit will explain the methodology and techniques used for building an end-to-end design enablement platform from component design to process design kit (PDK) release for photonic integrated circuit (PIC) design. Elements of the platform include layout and test site development, component design, test and measurement, and PDK development. Dikshit will demonstrate how a calibrated process stack file for component design can improve the accuracy of design and show how compact model extraction from measured data and features of layouts and connectivity is used in PDK development.
Tuesday, January 31 • 12:00 - 12:20 PM (PST)